A multimedia data stream can bottleneck as the data is transferred between memory and a processor or a co-processor. A bottleneck can occur because the processor uses computational cycles in order to issue an explicit instruction, which may be a request or direction from the processor for a block of data. For instance, the processor may stop processing multimedia data in order to issue an explicit instruction that directs memory to load a multimedia data block from the memory to the processor. The processor may issue numerous explicit instructions when processing the multimedia data stream.
A processor can also be delayed when retrieving multimedia data from external memory. While a cache can be used as an alternative to retrieving multimedia data from external memory, a cache may be ill-suited to handling multimedia data that typically includes a large amount of data. Additionally, a cache may be ill-suited for handling multimedia data that is used sequentially rather than being reused. Tightly coupled random access memory (TCRAM) is an alternative to caching multimedia data. When using TCRAM, the processor may still be delayed when having to issue an explicit instruction for a multimedia data block.